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91400 rm (im) hk no.6688-1/23 ver.1.01 22699 preliminary overview the lc86p5632 is a cmos 8-bit single chip microcontroller with one-time prom for the lc865600 series. this microcontroller has the function and the pin description of the lc865600 series mask rom version, and 32k-byte prom. dip/qfp package are available for shipping as well as lc865600 series. it is suitable to set up first release, prototyping, developing and testing of set. features (1) option switching by prom data the option function of the lc865600 series can be specified by the prom data. lc86p5632 can be checked the function of the trial pieces using the mass production board. (2) internal one-time prom capacity : 32768 bytes (3) internal ram capacity : 512 bytes used prom or ram capacity are equal rom or ram capacity of mask rom version which applies lc86p5632. mask rom version prom capacity ram capacity lc865632 32512 bytes 512 bytes lc865628 28672 bytes 512 bytes lc865624 24576 bytes 512 bytes lc865620 20480 bytes 384 bytes lc865616 16384 bytes 384 bytes lc865612 12288 bytes 384 bytes LC865608 8192 bytes 384 bytes programming service we offers various services at nominal charges. these include the rom writing, the rom reading, the package stamping and the screening. contact our representative for further information. 8-bit single chip microcontrolle r with one-time programmable prom lc86p5632 ordering number : enn*6688 cmos ic
lc86p5632 no.6688-2/23 (4) operating supply voltage : 4.5v to 6.0v (5) instruction cycle time : 0.98 s to 400 s (6) operating temperature : -30 c to +70 c (7) the pin and the package compatible with the lc865600 series mask rom devices (8) applicable mask rom version : lc865632/ lc865628/ lc865624/lc865620/lc865616/ lc865612/ LC865608 (9) factory shipment : dip64s, qfp64e notice for use lc86p5632 is provided for the first release and small shipping of the lc865600 series. at using, take notice of the followings. (1) a point of difference lc86p5632 and lc865600 series item lc86p5632 lc865632/28/24/20/16/12/08 port form at reset please refer ?port form at reset ? on next page. operation after reset releasing the option is specified until 3ms after going to a ?h? level to the reset terminal by dgrees. the program is executed from 00h of the program counter. the program is executed from 00h of the program counter immediately after going to a ?h? level to reset terminal. operating supply voltage range (vdd) 4.5v to 6.0v 2.7v to 6.0v total output current [ ioah(1)] [ ioah(2)] power dissipation [iddop(1)] [iddop(2)] [iddop(3)] [iddop(4)] refer to ?electrical characteristics? on the semiconductor news. a kind of the option corresponding of the lc86p5632 a kind of option pins, circuits contents of the option port 0 (specified in a bit) 1. input : no pull-up mos tr. output : n-channel open drain 2. input : pull-up mos tr. output : cmos port 1,2 (specified in a bit) 1. input : programmable pull-up mos tr. output : n-channel open drain 2. input : programmable pull-up mos tr. output : cmos input/output form of input/output ports port 3,4,5 (specified in a bit) 1. input : no programmable pull-up mos tr. output : n-channel open drain 2. input : programmable pull-up mos tr. output : cmos pull-up mos tr. of port7 port7 (specified in a bit) 1. pull-up mos tr. not provided 2. pull-up mos tr. provided * p74 has on pull-up resistor option. the port operation related the option is different at reset. refer to the next table.
lc86p5632 no.6688-3/23 port form at reset pin contents of the option lc86p5632 lc865632/28/24/20/16/12/08 input : not pull-up mos tr. output : n-channel open drain (same as the mask version) input mode without pull-up mos tr. (output is off) p0 input : pull-up mos tr. output : cmos input mode the pull-up mos tr. is not provided during reset or several hundred microseconds after releasing reset. after that, the pull-up mos tr. is provided. (output is off) input mode without pull-up mos tr. (output is off) input : programmable pull-up mos tr. output : n-channel open drain (same as the mask version) input mode without pull-up mos tr. (output is off) p1, p2 input : programmable pull-up mos tr. output : cmos (same as the mask version) input mode without pull-up mos tr. (output is off) input : not programmable pull-up mos tr. output : n-channel open drain (same as the mask version) input mode without pull-up mos tr. (output is off) p3, p4, p5 input : programmable pull-up mos tr. output : cmos (same as the mask version) input mode without pull-up mos tr. (output is off) pull-up mos tr. not provided (same as the mask version) input mode without pull-up mos tr. p7 pull-up mos tr. provided input mode the pull-up mos tr. is not provided during reset or several hundred microseconds after releasing reset. after that, the pull-up mos tr. is provided. input mode without pull-up mos tr. (2) option lc86p5632 uses 256 bytes which is addressed on 7f00h to 7fffh in the program memory as option data area. this area does not affect the execution of program but the program memory capacity of lc865632 is 32512 bytes which is addressed on 0000h to 7effh. the option data is created by the option specified program ?su865000.exe?. the created option data is linked to the program area by linkage loader ?l865000.exe?.
lc86p5632 no.6688-4/23 (3) rom space (4) ordering information 1. when ordering the identical mask rom and prom devices simultaneously. provide an eprom containing the target memory contents together with the separate order forms for each of the mask rom and prom versions. 2. when ordering a prom device. provide an eprom containing the target memory contents together with an order form. how to use (1) specification of option programming data for prom of the lc86p5632 is required. debugged evaluation file (eva file) must be converted to an intel-hex formatted file (hex file) with file converter program, eva2hex.exe. the hex file is used as the programming data for the lc86p5632. (2) how to program for the prom lc86p5632 can be programmed by the eprom programmer with attachment ; w86ep5032d, w86ep5032q. recommended eprom programmer productor eprom programmer advantest r4945, r4944, r4943 andou af-9704 aval pkw-1100, pkw-3000 minato electronics model 1890a ?27512 (vpp=12.5v) intel high speed programming? mode available. the address must be set to ?0000h to 7fffh? and a jumper (dasec) must be set to ?off? at programming . (3) how to use the data security function ?data security? is the disabled function to read the data of the prom. the following is the process in order to execute the data security. 1. set ?on? the jumper of attachment. 2. program again. then eprom programmer displays the error. the error means normally activity of the data security. it is not a trouble of the eprom programmer or the lsi. 7fffh 7f00h 7effh 6fffh 5fffh 4fffh 3fffh 2fffh 1fffh 0000h program area 32k bytes option data area 256 bytes lc865632 program area 28k bytes option data area lc865628 program area 24k bytes option data area lc865624 program area 20k bytes option data area lc865620 program area 16k bytes option data area lc865616 program area 12k bytes option data area lc865612 program area 8k bytes option data area LC865608
lc86p5632 no.6688-5/23 notes data security is not executed when the data of all address have ?ff? at the sequence 2 above. the programming by a sequential operation ?blank ? program ? verify? cannot be executed data security at the sequence 2 above. set to ?off? the jumper after executing the data security. w86ep5032d w86ep5032q data security not data security data security not data security 1 pin 1 pin mark of lsi 1 pin
lc86p5632 no.6688-6/23 package dimension (unit : mm) 3071 sanyo : dip-64s(750mil) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 p10/so0 p11/si0/sb0 p12/sck0 p13/so1 p14/si1/sb1 p15/sck1 p16/buz p17/pwm test1 res xt1/ p74 xt2 vss cf1 cf2 vdd p80/an0 p81/an1 p82/an2 p83/an3 p84/an4 p85/an5 p86/an6 p87/an7 p70/int0 p71/int1 p72/int2/t0in p73/int3/t0in p30 p31 p32 p33 p07 p06 p05 p04 p03 p02 p01 p00 p27 p26 p25 p24 p23 p22 p21 p20 vddvpp vss p51 p50 p47 p46 p45 p44 p43 p42 p41 p40 p37 p36 p35 p34
lc86p5632 no.6688-7/23 package dimension (unit : mm) 3159 sanyo: qip-64e notes the qfp packages should be heat-soaked for 12 hours at 125 c immediately prior to mounting (this baking is called pre-baking). after pre-baking, a controlled environment must be maintained until soldering. the environment must be held at a temperature of 30 c or less and a humidity level of 70% or less. please solder within 24 hours. p27 p26 p25 p24 p23 p22 p21 p20 vddvpp vss p51 p50 p47 p46 p45 p44 p17/pwm p16/buz p15/sck1 p14/si1/sb1 p13/so1 p12/sck0 p11/si0/sb0 p10/so0 p07 p06 p05 p04 p03 p02 p01 p00 p70/int0 p71/int1 p72/int2/t0in p73/int3/t0in p30 p31 p32 p33 p34 p35 p36 p37 p40 p41 p42 p43 test1 res xt1/ p74 xt2 vss cf1 cf2 vdd p80/an0 p81/an1 p82/an2 p83/an3 p84/an4 p85/an5 p86/an6 p87/an7 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
lc86p5632 no.6688-8/23 system block diagram interrupt control standby control clock generator cf rc x?tal ir pla eprom control eprom (32kb) pc acc b register c register psw rar ram stack pointer port 0 watch dog timer bus interface port 1 port 7 port 8 port 2 port 3 port 4 port 5 base timer sio0 sio1 timer 0 timer 1 adc int0 to 3 noise filter real time service xram (128 bytes) a15-a0 d7-d0 ta ce oe dasec vddvpp alu
lc86p5632 no.6688-9/23 lc86p5632 pin description pin name i/o function description option prom mode vss - power pin (-) - - vdd - power pin (+) - - vddvpp - power pin (+) - power for programming port0 p00 to p07 i/o 8-bit input/output port input for port 0 interrupt input/output in nibble units input for hold release pull-up resistor : provided/not provided output form : cmos/n-channel open drain - port1 p10 to p17 i/o 8-bit input/output port input/output can be specified in a bit unit other pin functions p10 sio0 data output p11 sio0 data input/bus input/output p12 sio0 clock input/output p13 sio1 data output p14 sio1 data input/bus input/output p15 sio1 clock input/output p16 buzzer output p17 timer 1 output (pwm0 output) output form : cmos/n-channel open drain data line d0 to d7 port2 p20 to p27 i/o 8-bit input/output port input/output can be specified in a bit unit output form : cmos/n-channel open drain port3 p30 to p37 i/o 8-bit input/output port input/output can be specified in a bit unit 15v withstand at n-channel open drain output output form : cmos/n-channel open drain address input a7 to a0 port4 p40 to p47 i/o 8-bit input/output port input/output can be specified in a bit unit 15v withstand at n-channel open drain output output form : cmos/n-channel open drain address input a14 to a8 (*5) p47 : ta (*4) port5 p50 to p51 i/o 2-bit input/output port input/output can be specified in a bit unit 15v withstand at n-channel open drain output output form : cmos/n-channel open drain 5-bit input port other pin functions p70 : int0 input/hold release/n-channel tr. output for watchdog timer p71 : int1 input/hold release input p72 : int2 input/timer 0 event input p73 : int3 input with noise filter/timer 0 event input p74 : 32.768khz crystal oscillation terminal xt1 interrupt received forms, the vector addresses pull-up resistor : provided/not provided (p70,71,72,73) p74 has no pull-up resistor. rising falling rising & falling high level low level vector int0 enable enable disable enable enable 03h int1 enable enable disable enable enable 0bh int2 enable enable enable disable disable 13h port7 p70 p71 to p74 i/o i int3 enable enable enable disable disable 1bh input of prom control signals dasec (*1) oe (*2) ce (*3) continue.
lc86p5632 no.6688-10/23 pin name i/o function description option prom mode port8 p80 to 87 i 8-bit input port other function ad input port (an7 to an0) - - res i reset pin - - test1 o test pin should be left unconnected. - - xt1/ p74 i input pin for 32.768khz crystal oscillation other function : input port p74 in case of non use, connect to vdd. - - xt2 o output pin for 32.768khz crystal oscillation other function in case of non use, should be left unconnected. - - cf1 i input pin for the ceramic resonator oscillation - - cf2 o output pin for the ceramic resonator oscillation - - ? all of port options can be specified in bit unit. *1 memory select input for data security *2 output enable input *3 chip enable input *4 ta ! prom control signal input *5 a14 ! address input * connect like the following figure to reduce noise into a vdd terminal. short-circuit the vdd terminal to the vddvpp terminal. short-circuit the vss terminal to the vss terminal. power supply vdd vss vss vddvpp lsi
lc86p5632 no.6688-11/23 1. absolute maximum ratings at vss=0v and ta=25 c ratings parameter symbol pins conditions v dd[v] min. typ. max. unit supply voltage vddmax vdd,vddvpp vdd=vddvpp -0.3 +7.0 input voltage vi(1) ports 71,72,73, 74 port 8 res -0.3 vdd+0.3 vio(1) ports 0,1,2 ports 3,4,5 at cmos output -0.3 vdd+0.3 input/output voltage vio(2) ports 3,4,5 at n-ch open drain output option -0.3 15 v peak output current ioph(1) ports 0,1,2,3,4,5 cmos output at each pins -4 ioah(1) ports 0,1,2 the total of all pins -25 high level output current total output current ioah(2) ports 3,4,5 the total of all pins -20 iopl(1) ports 0,1,2,3,4,5 at each pins 20 peak output current iopl(2) port 70 at each pins 15 ioal(1) ports 0,1,70 the total of all pins 40 ioal(2) port 2 the total of all pins 40 low level output current total output current ioal(3) ports 3,4,5 the total of all pins 80 ma pdmax(1) dip64s ta=-30 to+70c 720 maximum power dissipation pdmax(2) qfp64e ta=-30 to+70c 420 mw operating temperature range topr -30 70 storage temperature range tstg -65 150 c notes the qfp packages should be heat-soaked for 12 hours at 125 c immediately prior to mounting (this baking is called pre-baking). after pre-baking, a controlled environment must be maintained until soldering. the environment must be held at a temperature of 30 c or less and a humidity level of 70% or less. please solder within 24 hours.
lc86p5632 no.6688-12/23 2. recommended operating range at ta=-30 c to +70 c, vss=0v ratings parameter symbol pins conditions vdd[v] min. typ. max. unit operating supply voltage vdd(1) vdd 0.98 s tcyc tcyc 400 s 4.5 6.0 hold voltage vhd vdd rams and the registers hold voltage at hold mode. 2.0 6.0 vih(1) port 0 (schmitt) output disable 4.5 to 6.0 0. 4vdd +0.9 vdd vih(2) ports 1,2 ports 72,73 (schmitt) output disable 4.5 to 6.0 0.75vdd vdd vih(3) port 70 (port input/interrupt) port 71 res (schmitt) output n-channel tr. off 4.5 to 6.0 0.75vdd vdd vih(4) port 70 (watchdog timer) output n-channel tr. off 4.5 to 6.0 0.9vdd vdd vih(5) port 74 port 8 output n-channel tr. off 4.5 to 6.0 0.75vdd vdd input high voltage vih(6) ports 3,4,5 of cmos output (schmitt) output disable 4.5 to 6.0 0.75vdd vdd vih(7) ports 3,4,5 of open drain output (schmitt) output disable 4.5 to 6.0 0.75vdd 13.5 vil(1) port 0 (schmitt) output disable 4.5 to 6.0 vss 0.2vdd vil(2) ports 1,2,3,4,5 ports 72,73 (schmitt) output disable 4.5 to 6.0 vss 0.25vdd vil(3) port 70 (port input/interrupt) port 71 res (schmitt) n-channel tr.off 4.5 to 6.0 vss 0.25vdd vil(4) port 70 (watchdog timer) n-channel tr.off 4.5 to 6.0 vss 0. 8vdd -1.0 input low voltage vil(5) port 74 port 8 n-channel tr.off 4.5 to 6.0 vss 0.25vdd v operation cycle time tcyc 4.5 to 6.0 0.98 400 s fmcf(1) cf1, cf2 6mhz (ceramic resonator oscillation) refer to figure 1 4.5 to 6.0 6 fmcf(2) cf1, cf2 1.5mhz (ceramic resonator oscillation) refer to figure 1 4.5 to 6.0 1.5 fmrc rc oscillation 4.5 to 6.0 0.3 0.8 3.0 mhz oscillation frequency range (note 1) fsxtal xt1, xt2 32.768khz (crystal oscillation) refer to figure 2 4.5 to 6.0 32.768 khz continue.
lc86p5632 no.6688-13/23 ratings parameter symbol pins conditions vdd[v] min. typ. max. unit tmscf(1) cf1, cf2 6mhz (ceramic resonator oscillation) refer to figure 3 4.5 to 6.0 tmscf(2) cf1, cf2 1.5mhz (ceramic resonator oscillation) refer to figure 3 4.5 to 6.0 ms oscillation stabilizing time period (note 1) tssxtal xt1, xt2 32.768khz (crystal oscillation) ?refer to figure 3 4.5 to 6.0 s (note 1) the oscillation constant is shown on table 1 and table 2.
lc86p5632 no.6688-14/23 3. electrical characteristics at ta=-30 c to +70 c, vss=0v ratings parameter symbol pins conditions vdd[v] min. typ. max. unit iih(1) ports 3,4,5 at open drain output output disable vin=13.5v (including off-leakage current of the output tr.) 4.5 to 6.0 5 iih(2) port 0 without pull-up mos tr. ports 1,2,3,4,5 output disable pull-up mos tr. off. vin=vdd (including off-leakage current of the output tr.) 4.5 to 6.0 1 iih(3) ports 70,71,72,73 without pull-up mos tr. port 8 vin=vdd 4.5 to 6.0 1 input high current iih(4) res vin=vdd 4.5 to 6.0 1 iil(1) ports 1,2,3,4,5 port 0 without pull-up mos tr. output disable pull-up mos tr. off. vin=vss (including off-leakage current of the output tr.) 4.5 to 6.0 -1 iil(2) ports 70,71,72,73 without pull-up mos tr. port 8 vin=vss 4.5 to 6.0 -1 input low current iil(3) res vin=vss 4.5 to 6.0 -1 a voh(1) ioh=-1.0ma 4.5 to 6.0 vdd-1 output high voltage voh(2) ports 0,1,2,3,4,5 at cmos output ioh=-0.1ma 4.5 to 6.0 vdd-0.5 vol(1) iol=10ma 4.5 to 6.0 1.5 vol(2) ports 0,1,2,3,4,5 iol=1.6ma 4.5 to 6.0 0.4 vol(3) iol=1ma 4.5 to 6.0 0.4 output low voltage vol(4) port 70 iol=0.5ma 4.5 to 6.0 0.4 v pull-up mos tr. resistor rpu ports 0,1,2,3,4,5 ports 70,71,72,73 voh=0.9vdd 4.5 to 6.0 15 40 70 k ? hysteresis voltage vhis ports 0,1,2,3,4,5 ports 70,71,72,73 res output disable 4.5 to 6.0 0 .1vd d v pin capacitance cp all pins f=1mhz vin=vss for all unmeasured terminals. ta=25 c 4.5 to 6.0 10 pf
lc86p5632 no.6688-15/23 4. serial input/output characteristics at ta=-30 c to +70 c, vss=0v ratings parameter symbol pins conditions vdd[v] min. typ. max. unit cycle tckcy(1) 2 low level pulse width tckl(1) 1 input clock high level pulse width tckh(1) sck0,sck1 refer to figure 5 4.5 to 6.0 1 cycle tckcy(2) 2 low level pulse width tckl(2) 1/2tckcy serial clock output clock high level pulse width tckh(2) sck0,sck1 use pull-up resistor (1k ? ) in the open drain output. refer to figure 5 4.5 to 6.0 1/2tckcy tcyc data set-up time tick 0.1 serial input data hold time tcki si0,si1 sb0,sb1 data set-up to sck0,1 data hold from sck0,1 refer to figure 5 4.5 to 6.0 0.1 output delay time (external clock using for serial transfer clock) tcko(1) 7/12 tcyc +0.2 serial output output delay time (internal clock using for serial transfer clock) tcko(2) so0,so1 sb0,sb1 use pull-up resistor (1k ? ) in the open drain output. data hold from sck0,1 refer to figure 5 4.5 to 6.0 1/3 tcyc +0.2 s
lc86p5632 no.6688-16/23 5. pulse input conditions at ta=-30 c to +70 c, vss=0v ratings parameter symbol pins conditions vdd[v] min. typ. max. unit tpih(1) tpil(1) int0, int1 int2/t0in int3 interrupt acceptable timer0-countable 4.5 to 6.0 1 tpih(2) tpil(2) int3 (the noise rejection clock selected to 1/1.) interrupt acceptable timer0-countable 4.5 to 6.0 2 tpih(3) tpil(3) int3 (the noise rejection clock selected to 1/16.) interrupt acceptable timer0-countable 4.5 to 6.0 32 tcyc high/low level pulse width tpil(4) res reset acceptable 4.5 to 6.0 200 s 6. ad converter characteristics at ta=-30 c to + 70 c, vss=0v ratings parameter symbol pins conditions vdd[v] min. typ. max. unit resolution n 4.5 to 6.0 8 bit absolute precision (note 2) et 4.5 to 6.0 1.5 lsb ad conversion time = 16 tcyc (adcr2=0) (note 3) 15.68 (tcyc= 0.98 s) 65.28 (tcyc= 4.08 s) conversion time tcad ad conversion time = 32 tcyc (adcr2=1) (note 3) 4.5 to 6.0 31.36 (tcyc= 0.98 s) 130.56 (tcyc= 4.08 s) s analog input voltage range vain 4.5 to 6.0 vss vdd v iainh vain=vdd 4.5 to 6.0 1 analog port input current iainl an0 to an7 vain=vss 4.5 to 6.0 -1 a (note 2) absolute precision excepts the quantizing error (1/2 lsb). (note 3) the conversion time means the time from executing the ad conversion instruction to setting the complete digital conversion value to the register.
lc86p5632 no.6688-17/23 7. current dissipation characteristics at ta=-30 c to +70 c, vss=0v ratings parameter symbol pins conditions vdd[v] min. typ. max. unit iddop(1) fmcf=6mhz ceramic resonator oscillation fsxtal=32.768khz crystal oscillation system clock : cf oscillation internal rc oscillation stops 4.5 to 6.0 13 26 iddop(2) fmcf=1.5mhz ceramic resonator oscillation fsxtal=32.768khz crystal oscillation system clock : cf oscillation internal rc oscillation stops 4.5 to 6.0 7 14 iddop(3) fmcf=0hz (the oscillation stops) fsxtal=32.768khz crystal oscillation system clock : rc oscillation 4.5 to 6.0 4 10 current dissipation during basic operation (note 4) iddop(4) vdd fmcf=0hz (the oscillation stops) fsxtal=32.768khz crystal oscillation system clock : 32.768khz internal rc oscillation stops 4.5 to 6.0 4 8 ma continue.
lc86p5632 no.6688-18/23 ratings parameter symbol pins conditions vdd[v] min. typ. max. unit iddhalt(1) halt mode fmcf=6mhz ceramic resonator oscillation fsxtal=32.768khz crystal oscillation system clock : cf oscillation internal rc oscillation stops 4.5 to 6.0 5 10 iddhalt(2) halt mode fmcf=1.5mhz ceramic resonator oscillation fsxtal=32.768khz crystal oscillation system clock : cf oscillation internal rc oscillation stops 4.5 to 6.0 2.2 4.6 ma iddhalt(3) halt mode fmcf=0hz (the oscillation stops) fsxtal=32.768khz crystal oscillation system clock : rc oscillation 4.5 to 6.0 550 1000 current dissipation in halt mode (note 4) iddhalt(4) halt mode fmcf=0hz (the oscillation stops) fsxtal=32.768khz crystal oscillation system clock : 32.768khz internal rc oscillation stops 4.5 to 6.0 25 100 iddhold(1) 4.5 to 6.0 0.05 30 current dissipation in hold mode (note 4) iddhold(2) vdd hold mode 2.5 to 4.5 0.02 20 a (note 4) the currents of the output transistors and the pull-up mos transistors are ignored.
lc86p5632 no.6688-19/23 table 1. ceramic resonator oscillation recommended constant (main clock) oscillation type maker oscillator c1 c2 rf rd csa12.0mtz 33pf 33pf open 560 ? csa12.0mtz 39pf 30pf open 0 ? 12mhz ceramic resonator oscillation murata cst12.0mtw on chip open 560 ? csa3.00mg040 100pf 100pf open 1.5 ? 3mhz ceramic resonator oscillation murata cst3.00mgw040 on chip open 1.5 ? * both c1 and c2 must use k rank (10%) and sl characteristics. table 2. crystal oscillation recommended constant (sub clock) oscillation type maker oscillator c3 c4 kyocera kf-38g-13p0200 18pf 18pf 32.768khz crystal oscillation seiko epson mc-306,c-002rx,32.768khz 4pf 4pf * both c3 and c4 must use j rank (5%) and ch characteristics. (it is about the application which is not in need of high precision. use k rank (10%) and sl characteristics.) (notes) since the circuit pattern affects the oscillation frequency, place the oscillation-related parts as close to the oscillation pins as possible with the shortest possible pattern length. figure 1 main-clock circuit figure 2 sub-clock circuit ceramic oscillation circuit crystal oscillation cf1 cf2 rd c2 c1 cf rf xt1 xt2 c4 c3 x?tal
lc86p5632 no.6688-20/23 figure 3 oscillation stable time power supply res internal rc resontor oscillation cf1, cf2 xt1, xt2 operation mode reset time tmscf tssxtal vdd vdd limit 0v reset unfixed instruction execution mode hold release signal internal rc resontor oscillation cf1, cf2 xt1, xt2 operation mode valid tmscf tssxtal instruction execution mode hold
lc86p5632 no.6688-21/23 figure 4 reset circuit figure 5 serial input / output test condition figure 6 pulse input timing condition (note) fix the value of cres, rres that is sure to reset until 200 s, after power supply has been over inferior limit of supply voltage. c res r res vdd res 0.5vdd vdd 1k ? 50 p f tckcy tckl tckh tick tcki tcko sck0 sck1 si0 si1 so0, so1 sb0, sb1 tpil tpih
lc86p5632 no.6688-22/23 notice for use ? the construction of the one-time programmable microcomputer with a blank built-in prom makes it impossible for sanyo to completely factory-test it before shipping. to probe reliability of the programmed devices, the screening procedure shown in the following figure should always be followed. ? it is not possible to perform a writing test on the blank prom. 100% yield, therefore, cannot be guaranteed. ? keeping the dry packing the environment must be held at a temperature of 30 c or less and a humidity level of 70% or less. ? after opening the packing the preparation procedures shown in the following figure should always be followed prior to mounting the packages on the substrate. after opening the packing, a controlled environment must be maintained until soldering. the environment must be held at a temperature of 30 c or less and a humidity level of 70% or less. please solder within 96 hours. unused devices should be kept in the dry atmosphere such as inside of desiccator or dry these up before assembling on the board. a. shipping with a blank prom (programming the data by yourself) b. shipping with a programmed prom (programming the data by sanyo) recommended process of screening dip programming and verifying heat-soak 1505c, 24 hr +1 -0 reading ascertation of program mounting recommended process of screening qfp programming and verifying heat-soak 1505c, 24 hr +1 -0 reading ascertation of program mounting mounting mounting dip qfp
lc86p5632 no.6688-23/23 ps

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